Digital Design: Principles and Practices (5e) : 9780134460093

Digital Design: Principles and Practices (5e)

 
Edition
 
5
ISBN
 
9780134460093
ISBN 10
 
013446009X
Published
 
26/05/2017
Published by
 
Pearson Higher Ed USA
Pages
 
912
Format
 
Out of stock
 
Title type
Book
$337.99
 
 
Title type
 
$60.00
 
 
Description

For courses in digital design

 

Establishing a solid foundation of digital design principles

An authoritative introduction to basic digital design, Digital Design: Principles and Practices helps students build a foundational understanding of theoretical and engineering principles. This book gives students the opportunity to learn the basics at the high level (HDLs), at the low level (electrical circuits), and throughout the “vast middle” (gates, flip-flops, and higher-level digital-design building blocks). The author’s 30 years of experience in both industrial and university settings brings weight and credibility to the material, and with broad coverage of logic design practices, the 5th Edition gives students a look at how digital design works in the real world.

Table of contents

1. Introduction

2. Number Systems and Codes

3. Combinational Logic Design Principles

4. Digital Design Practice

5. Hardware Description Languages

6. Combinational Logic Design Practices

7. Sequential Logic Design Principles

8. Combinational Circuits for Arithmetic Functions

9. Introduction to State Machines

10. Elements of Sequential Logic Design

11. Counters and Shift Registers

12. Modeling State Machines

13. Sequential Logic Design Practices

14. Digital Circuit Operation

15. Memory, CPLDs, and FPGAs

New to this edition

About the Book

 

• Verilog coverage only; there’s no VHDL.

• Contains many more HDL examples and a much greater emphasis on design flow and on test benches, including purely stimulative as well as self-checking ones.

• TTL, SSI, MSI, 74-series logic, PLDs, and CPLDs have been deprecated.

• Karnaugh-map-based minimization has been minimized.

• A greater emphasis on FPGA-based design, FPGA architectural features, and synthesis results and trade-offs.

 

Content updates

 

• To make the book more accessible to non-EE computer engineering students, detailed coverage of CMOS circuits has been moved to Chapter 14 and a minimal amount of electronics has been added to Chapter 1 so that the CMOS chapter can be skipped entirely if desired.

• Verilog concepts are interspersed in sidebars in Chapters 6 and 7 while retaining a comprehensive Verilog tutorial and reference in Chapter 5.

• The chapter on combinational-logic elements has been split into three, to facilitate going straight to state machines after just the first if desired. This also allows more coverage of arithmetic circuits in the last.

• An entire chapter has been devoted to state-machine design in Verilog, including many examples.

• The chapter on synchronous design methodology now contains a detailed control-unit-plus-datapath example and a comprehensive example on crossing clocking domains using asynchronous FIFOs.

Features & benefits

About the Book

 

Principles and practices theme

  • Students are introduced to the fundamentals, as well as how digital design works in the real world.
  • Focused Verilog coverage reduces distractions and gives a more in-depth look at most common language in the industry.
  • Coverage of CMOS circuits later in the text makes the book more accessible for non-EE computer engineering students.
  • Sidebars discuss important Verilog concepts to make key points stand out for students.
  • REVISED! More specific combinational logic coverage splits chapter into three parts to allow classes to skip certain sections, and to provide more focused coverage of state machines and arithmetic circuits.
  • NEW! An entire state-machine design chapter focuses on designing state machines in Verilog, using many examples to lay out the process clearly and accurately.

 

Features for student success

  • UPDATED! More contemporary exercises and problems reflect current state of digital design to provide students with relevant scenarios and examples.
  • EXPANDED! More HDL examples emphasize design flow and test benches, including purely stimulative and self-checking ones.
  • Comprehensive discussions and examples put greater emphasis on FPGA-based design, FPGA architectural features, and synthesis results and trade-offs.
  • Synchronous design methodology examples include detailed cases on control-unit-plus-datapath and crossing clocking domains using asynchronous FIFOs.